Florent de Dinechin's research

I am a proud member of the Socrate team of the CITI laboratory .

Current research topics

My two main research topics below are blended in the ANR-funded MetaLibm project, 2014-2017 and Imprenum project, 2018-2022.

Hardware and FPGA Arithmetic

Current focus is on the FloPoCo project, a generator of arithmetic cores for FPGA computing, the subject of Bogdan Pasca's PhD, then Matei Istoan's. Some cores are similar to what you find in your processor, but the main purpose of this project is to design radically new ones that exploit FPGA flexibility. This includes operators for the evaluation of elementary functions in floating-point, see for instance our flagship exponential function. In this context, we also revisited Kulisch's long accumulator, we did some work on decimal multiplication, on polynomial evaluation, constant multiplication and division, etc. FloPoCo is also a VHDL generator framework with unique features, such as the frequency-directed construction of correct-by-design pipelines, and automatic testbench generation.

The on-going PhD of Yohann Uguen consists in embedding this expertise in High-Level Synthesis (HLS) tools. This article shows that it enables arithmetic optimizations out of reach of the FloPoCo approach.

Since I joined CITI Lab I have also been working on cores for signal processing, for instance fix-point arctangent, and FIR and IIR filters computing just right.

I am also interested in designing new general purpose hardware operators, such as the mixed-precision fused multiply-and-add and correctly-rounded sum of products we proposed for the Kalray processor. With the PhD of Nicolas Brunie, we also investigated the benefits of a closely-coupled reconfigurable accelerator in the context of a massively multicore design. In the same line, the on-going thesis of Andrea Bocco studies the hardware implementation of UNUM arithmetic.

Previously, with Jérémie Detrey, who defended his PhD in 2007, we have been investigating fixed-point function evaluation (using table-and-addition methods or small multipliers). This has been used to design operators for the logarithm number systems in the FPLibrary project (now superseded by FloPoCo).

As FPGAs may be viewed as fine-grained massively parallel computers, I am also interested in programming methodologies inherited from the parallel computing community, which was the subject of my thesis.

Software implementation of elementary functions with correct rounding.

This was the subject of the PhDs of David Defour and Christoph Lauter. This work was linked with the development of the Correctly Rounded Math Library (CRLibm), archived here. The techniques used have tracked processor technology: see this article, this one and this one for older methods, and this one for a recent technique with very low overhead. CRLibm could also be used to build "perfect" elementary functions for interval arithmetic.

Starting with Ch. Lauter's PhD, the focus has been on automation of libm code generation and on formal proof generation. Software is now developed in the MetaLibm project.

Awards

Links

Publications

Old software

A kind of outdated resume but it's in French

The places where I've been to get there

A picture of all my former PhD students gathered at Arith22 in 2015

Left to right: David Defour (univ. Perpignan), Jeremie Detrey (Inria), Christoph Lauter (UPMC Paris VI), F. de Dinechin, Bogdan Pasca (Altera), Nicolas Brunie (Kalray), Matei Istoan (PhD in progress) 7 guys and not a single girl...