Circuits computing just right
Version 4 is being released in 2016! See the release notes
Check out its list of operators.
A lot has been going on (transition to Sollya4, rewriting operators for bit-heaps, fixed-point support, new command-line interface ...).
Some operators have been removed or broken by these framework changes.
If you use it, please test each operator with the associated testbench generator (testbenches can be trusted and checked!).
FloPoCo is a generator of arithmetic cores (Floating-Point Cores, but not only) for FPGAs (but not only).
The first motto of FloPoCo is that arithmetic on FPGAs should not mimick processor arithmetic. By designing radically new operators, one may obtain more accurate results with less hardware in less time. This thesis was first detailed in this document.
The second motto of FloPoCo is to enable computing just right. All FloPoCo operators are
FloPoCo is not a library of operators, but a generator of operators written in C++. It inputs operator specifications, and outputs synthesizable VHDL.
FloPoCo is open-source. Contributions are welcome!
Installation instructions (including one-line install for Ubuntu) are provided in the user manual.
The intent of the authors is to distribute FloPoCo as free software (in the FSF AGPL sense), while imposing that the source code generated by FloPoCo is also free software (also AGPL-like). The (A)GPL doesn't seem to allow that, so it seems we have to invent something.
Current state of the license is therefore "all right reserved", which just means that the distribution terms are still being decided by the copyright owners (a consortium of the employers of the authors).
If this is a problem for your application, we are ready to negociate a commercial license: contact us.
For some slides, see a FloPoCo tutorial at HiPEAC 2013.
If you want to refer to a specific operator, please cite the publication that describes it, if it exists.
Otherwise, or if you want to refer to the framework, or the project as a whole, please publication below:
Florent de Dinechin and Bogdan Pasca. Designing custom arithmetic data paths with FloPoCo. IEEE Design & Test of Computers, 28(4):18--27, July 2011. [ bib | .pdf ]
FloPoCo is managed by Florent de Dinechin (contact: Florent.de-Dinechin at insa-lyon.fr).
Active developers: Nicolas Brunie, Fabrizio Ferrandi, Matei Istoan, Antoine Martinet, David Thomas.
Former developers: Sebastian Banescu, Sylvain Collange, Kinga Illyes, Cristian Klein, Mioara Joldes, Bogdan Pasca, Bogdan Popa, Xavier Pujol, Guillaume Sergent, Radu Tudoran, Alvaro Vasquez.
Much of FloPoCo's operator code is based on FPLibrary and HOTBM code by Jérémie Detrey.
The following people have contributed to FloPoCo in some sort or some other: Greg Davey, Mariusz Grad, Daniele Mastrandrea, Pedro Echeverría Aramendi.
FloPoCo uses Sollya, developed by Christoph Lauter, Sylvain Chevillard and Mioara Joldes. It also relies on GMP and MPFR.
FloPoCo is essentially developed using Free Software. Special thanks to the GHDL project for providing us a perfectly useable VHDL simulator that we can use when we are away from our ModelSim license servers.
The following support is gratefully acknowledged